The technical field relates to an atomic resolution storage (ARS) system, and, in particular, to device isolation process flow for the ARS system.
An ARS system provides a thumbnail-size device with storage densities greater than one terabit (1,000 gigabits) per square inch. The ARS technology builds on advances in atomic probe microscopy, in which a probe field emitter tip as small as a single atom scans the surface of a material to produce images accurate within a few nanometers. Probe storage technology may employ an array of atom-size probe field emitter tips to read and write data to spots on storage media.
An ARS system typically includes three bonded silicon (Si) wafers, i.e., a tip wafer, also known as an emitter wafer, a rotor wafer, also known as a mover wafer, and a stator wafer. The wafers are bonded together using wafer bonding techniques, which are well known in the art.
FIG. 1 illustrates a prior art ARS system, where all diodes share common electrodes. A tip wafer 110 includes a plurality of field emitter tips 114. A phase change layer 123, which may serve as a storage media to store data bits, is deposited on a substrate rotor wafer 120, also known as mover wafer. The substrate rotor wafer 120 is a highly doped Si substrate, which may be a n-type substrate or a p-type substrate. A capping layer 160 is coated over the phase change layer 123 to protect the phase change layer 123 and to prevent evaporation of material when heat is applied. The capping layer 160 also modifies the surface states of the phase change layer 123. Electron beam focusing electrodes 113 enables focused electron bean 116 to change the phase of media film locally. The rotor wafer 120 may move in x and y direction, as shown in FIG. 1, to allow data bits to be written to or read from the storage media.
The ARS storage media uses p-n junction diodes, i.e., devices embedded in a top active Si layer for reading the data bit. In the prior art ARS system, the diodes share common electrodes (not shown), which may increase cross talk between devices, leading to higher electrical noise.
A method for device isolation for an ARS system includes forming an insulating layer between a wafer substrate, such as a rotor wafer, and a top active Si layer, forming a phase change layer over the top active Si layer, depositing, patterning, and selectively etching a masking layer over the phase change layer, and etching the top active Si layer using the masking layer as a mask until reaching the insulating layer. As a result, diodes, i.e., devices embedded in the top active Si layer, may become electrically isolated from one another to enhance signal to noise ratio for the ARS system.
In an embodiment of the device isolation process flow, the insulating layer is formed by ion implantation of oxygen beneath the top active Si layer on the wafer substrate and heating the oxygen to form oxide.
In another embodiment of the device isolation process flow, the insulating layer is formed by epitaxially growing Si with counter dopants over the rotor wafer substrate and heating the counter dopants.
The device isolation process flow inserts device isolation into a process flow of the ARS system so that the diodes may be electrically insulated from one another to improve signal to noise ratio. In addition, since most harsh processing are done prior to depositing the phase change layer, which stores data bits, process damage to the phase change layer may be minimized.